A virtual hardware operating system for the Xilinx XC6200-Reference-Cited by-同舟云学术

A virtual hardware operating system for the Xilinx XC6200

Published:1996 Issue: Volume: Page:327-336
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
Short-container-title:

Author:

Brebner Gordon

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-61730-2_35.pdf

Reference8 articles.

1. Brebner: “The SPODE circuit design library for the XC6200,” Internal report, Department of Computer Science, University of Edinburgh, 1996.

2. Brebner and Gray: “Use of reconfigurability in variable-length code detection at video rates,” Proc. 5th International Workshop on Field Programmable Logic and Applications, Springer-Verlag 1995.

3. Eldredge and Hutchings: “RRANN: a hardware implementation of the backpropagation algorithm using reconfigurable FPGAs,” Proc. IEEE International Conference on Neural Networks, 1994.

4. Hadley and Hutchings: “Design methodologies for partially reconfigured systems,” Proc. IEEE Workshop on FPGAs for Custom Computing Machines, 1995.

5. Kean, Churcher and Wilkie: “XC6200 fastmap processor interface,” Proc. 5th International Workshop on Field Programmable Logic and Applications, 1995.

Cited by 37 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. ChamelIoT: a tightly- and loosely-coupled hardware-assisted OS framework for low-end IoT devices;Real-Time Systems;2023-12-20

2. Agnostic Hardware-Accelerated Operating System for Low-End IoT;2022 IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA);2022-08

3. DynPath–Non-Intrusive Feature-Rich Hardware-Based Execution Path Profiler;IEEE Access;2022

4. Compilation System;Software Defined Chips;2022

5. Multi-resource scheduling for FPGA systems;Microprocessors and Microsystems;2021-11