Author:
Turner L. E.,Graumann P. J. W.,Gibb S. G.
Publisher
Springer Berlin Heidelberg
Reference11 articles.
1. J.B.Evans. Efficient fir filter architectures suitable for fpga implementation. IEEE Transactions on Circuits and Systems-II, pages 490–493, 1994.
2. P.T. Yang R. Jain and T. Yoshino. Firgen: A computer-aided design system for high performance fir filter integrated circuits. IEEE Transactions on Signal Processing, pages 1655–1668, 1991.
3. D.R. Bull and G. Wacey. Bit-serial digital filter architecture using ram-based delay operators. IEE Proc.-Circuits Devices Syst., pages 4–19, 1994.
4. P.J. Graumann and L.E. Turner. Implementing dsp algorithms using pipelined bit-serial arithmetic and FPGAs. First International ACM/SIGDA Workshop on FPGAs, pages 123–128, 1992.
5. P.J. Graumann and L.E. Turner. Specifying and hardware prototyping of dsp systems using a register transfer level language, pipelined bit-serial arithmetic and fpgas. 2nd Canadian Workshop on Field Programmable Devices, 1994.
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