An FPGA prototype for a multiplierless FIR filter built using the logarithmic number system
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Publisher
Springer Berlin Heidelberg
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http://link.springer.com/content/pdf/10.1007/3-540-60294-1_124.pdf
Reference6 articles.
1. Integrated Circuit Logarithmic Units Jeffrey et al IEEE Trans on Computers Vol C-34 No 5 May 1985
2. Digital Filtering using Logarithmic Arithmetic N.G Kingsbury P.J.W Rayner IEE Electronics Letters 28th Jan 1971 Vol.7 NO.2 pp 56–58
3. Error Analysis of Recursive Digital Filters Implemented with Logarithmic Number Systems. T. Kurokawa, J. A. Payne, S.C. Lee IEEE Transactions ASSP Vol. ASSP-28 No. 6 December 1980.
4. Computation of the Base Two Logarithm of Binary Numbers.-M. Combet, H.Van Zonneveld, L Verbeek IEEE Transactions on Electronic Computers Vol EC-14 No. 6 Dec 1963 pp 863–867
5. New Algorithms for the Approximate Evaluation in Hardware of Binary Logarithms and Elementary Functions.-D. Marino IEEE Transactions on Computers December 1972 pp1416–1421
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