Hardware Efficient Root-Raised-Cosine Pulse Shaping Filter for DVB-S2 Receivers

Author:

Agarwal Vikas,Kim Pansoo,Oh Deock-Gil,Ahn Do-Seob

Publisher

Springer Berlin Heidelberg

Reference6 articles.

1. Digital video broadcasting (DVB); Framing structure, channel coding and modulation for 11/12 GHz satellite services, EN300 421 (V1.1.2), European Telecommunications Standards Institute, ETSI (1997)

2. Eshtawie, M.A.M., Othman, M.B.: An Algorithm Proposed for FIR Filter Coefficients Representation. International Journal of Applied Mathematics and Computer Sciences 4(1), 24–30 (2008)

3. Lee, P.: An FPGA Prototype for a Multiplierless FIR Filter Built using the Logarithmic Number System. In: Proc. 5th International Workshop on Field-Programmable Logic and Applications FPL, pp. 303–310 (1995)

4. Dempster, G., Macleod, M.D.: Use of Minimum-Adder Multiplier Blocks in FIR Digital Filters. IEEE Trans. Circuits Syst. 42(9), 569–577 (1995)

5. Lim, Y.C., Parker, S.R.: FIR Filter Design Over Discrete Powers-of-Two. IEEE Transactions on Acoustics, Speech, and Signal Proc., assp-31(3) (June1983)

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