1. Ismail, K. Si/SiGe CMOS: Can it extend the lifetime of Si? In Proceedings of the 1997 IEEE International Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC, San Francisco, CA, USA, 1997, pp 116–117.
2. Lee, S. J.; Lee, C.-H.; Kim, Y. H.; Luan, H. F.; Bai, W. P.; Jeon, T. S.; Kwong, D. L. High-k gate dielectrics for sub-100 nm CMOS technology. In Proceedings of the 6th International Conference on Solid-State and Integrated-Circuit Technolog, Shanghai, China, 2001, pp 303–308.
3. Breed, A.; Roenker, K. P. Dual-gate (FinFET) and tri-gate MOSFETs: Simulation and design. In Proceedings of the 2003 International Semiconductor Device Research Symposium, Washington, DC, USA, 2003, pp 150–151.
4. Mogami, T. Challenges for sub-10 nm CMOS devices. In Proceedings of the 8th International Conference on Solid-State and Integrated Circuit Technology, Shanghai, China, 2006, pp 23–26.
5. Avouris, P.; Chen, Z. H.; Perebeinos, V. Carbon-based electronics. Nat. Nanotochnol. 2007, 2, 605–615.