Efficient detection of transistor stuck-on faults in CMOS circuits using low-overhead single-ended ring oscillators

Author:

Huq S. M. IshraqulORCID,Roy Apratim,Ahmed Mushfiqul,Mahin Ayman Uddin

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Modeling and Simulation,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference22 articles.

1. Jha, N.K., Kundu, S.: Testing and Reliable Design of CMOS Circuits. Kluwer Academic, Massachusetts (1990)

2. Rinitha, R., Ponni, R.: Testing in VLSI: a survey. In: Proceedings of International Conference on Emerging Trends in Engineering, Technology and Science (2016)

3. Asvini, S., Nirmala, C.: Design for testability in timely testing of VLSI circuits. Int. J. Eng. Res. Appl. 5(3), 10–13 (2015)

4. Plusquellic, J.: Faults 2. VLSI design verification and test slides, Department of CSEE, University of Maryland, Baltimore County (UMBC), Maryland (2006)

5. Malaiya, Y.K., Su, S.Y.H.: A new fault model and testing technique for CMOS devices. In: Proceeding of International Test Conference, pp. 25–34 (1982)

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