Author:
Justeena A. Nisha,Ambika R.,Sadagopan P. S. S. K. P.,Srinivasan R.
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering,Modeling and Simulation,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference17 articles.
1. Kim, K., Fossum, J.G.: Double-gate CMOS: symmetrical versus asymmetrical-gate devices. IEEE Trans. Electron Devices 48(2), 294–299 (2001)
2. Liu, Y.X., et al.: Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross section Si-Fin channel. In: IEDM Tech Dig., pp. 986–988 (2003)
3. Gnani, E., Reggiani, S., Rudan, M., Baccarani, G.: Design considerations and comparative investigation of ultra-thin SOI, double-gate and cylindrical nanowire FETs. In: IEEE ESSDERC Proceeding, pp. 371–374 (2006)
4. Bangsaruntip, S., Cohen, G.M., Majumdar, A., Zhang, Y., Engelmann, S.U., Fuller, N.C.M., Gignac, L.M., Mittal, S., Newbury, J.S., Guillorn, M., Barwicz, T., Sekaric, L., Frank, M.M., Sleight, J.W.: High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling. In: Proceedings of IEDM, pp. 1–4 (2009)
5. Tekleab, D.: Device performance of silicon nanotube field effect transistor. IEEE Electron Device Lett. 35(5), 506–508 (2014)
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献