Performance Comparison and Design Guidelines for Type II and Type III PLLs
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
http://link.springer.com/article/10.1007/s00034-015-0011-y/fulltext.html
Reference20 articles.
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2. A. Carlosena, A. Manuel-Lazaro, Design of high-order phase-lock loops. IEEE Trans. Circuits Syst. II: Express Briefs 54(1), 9–13 (2007)
3. A. Carlosena, A. Manuel-Lazaro, General method for phase-locked loop filter analysis and design. IET Circuits Devices Syst. 2(2), 249–256 (2008)
4. A. Carlosena, M. Ugarte, A. Lopez-Martin, Loop filter approximations for PLLs. in 51st Midwest Symposium on Circuits and Systems. MWSCAS 2008, pp. 21–24 (2008)
5. F.M. Gardner, Phaselock Techniques (Wiley, Hoboken, 2005)
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