A High-Speed VLSI Architecture for Motion Estimation Using Modified Adaptive Rood Pattern Search Algorithm-Reference-Cited by-同舟云学术

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A High-Speed VLSI Architecture for Motion Estimation Using Modified Adaptive Rood Pattern Search Algorithm

Published:2018-02-15 Issue:10 Volume:37 Page:4548-4567
ISSN:0278-081X
Container-title:Circuits, Systems, and Signal Processing
language:en
Short-container-title:Circuits Syst Signal Process

Author:

Biswas Baishik,Mukherjee Rohan,Chakrabarti Indrajit,Dutta Pranab Kumar,Ray Ajoy Kumar

Publisher

Springer Science and Business Media LLC

Subject

Applied Mathematics,Signal Processing

Link

http://link.springer.com/article/10.1007/s00034-018-0778-8/fulltext.html

Reference22 articles.

1. A. Akin, M. Cetin, Z. Ozcan, B. Erbagci, I. Hamzaoglu, An adaptive bilateral Motion Estimation algorithm and its hardware architecture. IEEE Trans. Consum. Electron. 58(2), 712–720 (2012)

2. B. Biswas, R. Mukherjee, I. Chakrabarti, Efficient architecture of adaptive rood pattern search technique for fast motion estimation. Microprocess. Microsyst. 39(3), 200–209 (2015)

3. S.K. Chatterjee, I. Chakrabarti, Low power VLSI architecture for 1-bit transformation based fast motion estimation. IEEE Trans. Consum. Electron. 56(4), 2652–2660 (2010)

4. S.K. Chatterjee, I. Chakrabarti, Power efficient Motion Estimation algorithm and architecture based on pixel truncation. IEEE Trans. Consum. Electron. 57(4), 1782–1790 (2011)

5. Y. Ding, X.L. Yan, Parallel architecture of motion estimation for video format conversion with center biased diamond search, in International Conference on Information Engineering and Computer Science, 2009. ICIECS 2009, pp. 1–4 (2009)

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