Design of a 10-nm FinFET 11 T Near-Threshold SRAM Cell for Low-Energy Internet-of-Things Applications
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
https://link.springer.com/content/pdf/10.1007/s00034-022-02251-9.pdf
Reference19 articles.
1. E. Abbasian, S. Birla, E. Mojaveri Moslem, Design and investigation of stability-and power-improved 11T SRAM cell for low-power devices. Int. J. Circuit Theory Appl. 50(11), 3827–3845 (2022)
2. E. Abbasian, M. Gholipour, Design of a highly stable and robust 10T SRAM cell for low-power portable applications. Circuits Syst. Signal Process. 41, 5914–5932 (2022)
3. E. Abbasian, F. Izadinasab, M. Gholipour, A reliable low standby power 10T SRAM cell with expanded static noise margins. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4), 1606–1616 (2022)
4. E. Abbasian, E. Mani, M. Gholipour, M. Karamimanesh, M. Sahid, A. Zaidi, A schmitt-trigger-based low-voltage 11 T SRAM cell for low-leakage in 7-nm FinFET technology. Circuits Syst. Signal Process. 41, 3081–3105 (2022)
5. M. Ansari, H. Afzali-Kusha, B. Ebrahimi, Z. Navabi, A. Afzali-Kusha, M. Pedram, A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies. Integration 50, 91–106 (2015)
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