Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Reference31 articles.
1. E. Azimi, A. Behrad, M.B. Ghaznavi-Ghoushchi, A fully pipelined and parallel hardware architecture for real-time BRISK salient point extraction. J. Real-Time Image Proc. 16, 1859–1879 (2019)
2. G. Bernacchia and M. C. Papaefthymiou, Analytical macromodeling for high-level power estimation, in Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design (IEEE Press, 1999), pp. 280–283
3. A. Bonanno, A. Bocca, A. Macii, E. Macii, and M. Poncino, Data-driven clock gating for digital filters, in International Workshop on Power and Timing Modeling, Optimization and Simulation (Springer, 2009), pp. 96–105
4. Y.-H. Chen, T.-J. Yang, J. Emer, V. Sze, Eyeriss v2: a flexible accelerator for emerging deep neural networks on mobile devices. IEEE J. Emerg. Sel. Top. Circuits Syst. 9(2), 292–308 (2019)
5. Y.-H. Chen, T. Krishna, J.S. Emer, V. Sze, Eyeriss: an energy-efficient reconfigurable accelerator for deep convolutional neural networks. IEEE J. Solid-State Circuits 52(1), 127–138 (2016)
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