Author:
Qiu Lei,Zheng Yuanjin,Siek Liter
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Reference26 articles.
1. W.C. Black, D.A. Hodges, Time-interleaved converter arrays. IEEE J. Solid State Circuits 15(6), 1024–1029 (1980)
2. D. Camarero, K. Ben Kalaia, J.F. Naviner, P. Loumeau, Mixed-signal clock-skew calibration technique for time-interleaved ADCs. IEEE Trans. Circuits Syst. I: Regul. Pap. 55(11), 3676–3687 (2008)
3. L. Chi Ho, P.J. Hurst, S.H. Lewis, A four-channel time-interleaved ADC with digital calibration of inter-channel timing and memory errors. IEEE J. Solid State Circuits 45(10), 2091–2103 (2010)
4. V. Divi, G. Wornell, Blind calibration of timing skew in time-interleaved analog-to-digital converters. IEEE J. Sel. Top. Signal Process. 3(3), 509–522 (2009)
5. N.L. Dortz et al., A 1.62GS/s Time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS. IEEE ISSCC Dig. Tech. Papers, (2014) pp. 386–387
Cited by
5 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献