Design of Fast-Locked Digitally Controlled Low-Dropout Regulator for Ultra-low Voltage Input

Author:

Yang Wei-Bin,Lin Yu-Yao,Lo Yu-LungORCID

Publisher

Springer Science and Business Media LLC

Subject

Applied Mathematics,Signal Processing

Reference36 articles.

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3. L.Y. Chiou, C.R. Huang, C.C. Cheng, Y.L. Tsai, A 300mV sub-1pJ differential 6T sub-threshold SRAM with low energy and variability resilient local assist circuit, in IEEE International Symposium on Next-Generation Electronics Conference, (2013), pp. 337–340

4. C.C. Chiu, P.H. Huang, M. Lin, K.H. Chen, Y.H. Lin, T.Y. Tsai, C.C.C. Lee, A 0.6 V resistance-locked loop embedded digital low dropout regulator in 40 nm CMOS with 80.5% power supply rejection improvement. IEEE Trans. Circuits Syst. I Regul. Pap. 62(1), 59–69 (2015)

5. S.S. Chong, P.K. Chan, A quiescent power-aware low-voltage output capacitorless low dropout regulator for SoC applications, in IEEE International Symposium on Circuits and Systems, (2011), pp. 37–40

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