1. I. Arsovski, T. Hebig, D. Dobson, R. Wistort, A 32 nm 0.58-fj/bit/search 1-GHz ternary content addressable memory compiler using silicon-aware early-predict late-correct sensing with embedded deep-trench capacitor noise mitigation. IEEE J. Solid-State Circuits 48(4), 932–939 (2013)
2. M. Becchi, P. Crowley, Efficient regular expression evaluation: theory to practice, in Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, ANCS ’08. ACM, New York, NY, USA (2008), pp. 50–59. http://doi.acm.org/10.1145/1477942.1477950
3. Y.J. Chang, Y.H. Liao, ybrid-type CAM design for both power and performance efficiency. IEEE Trans. Very Large Scale Integr. Syst. 16(8), 965–974 (2008)
4. S. Cho, J. Martin, R. Xu, M. Hammoud, R. Melhem, CA-RAM: a high-performance memory substrate for search-intensive applications, in IEEE International Symposium on Performance Analysis of Systems Software, 2007. ISPASS 2007, pp. 230–241 (2007).
5. S. Dharmapurikar, P. Krishnamurthy, D. Taylor, Longest prefix matching using bloom filters. IEEE/ACM Trans. Netw. 14(2), 397–409 (2006)