Approaches to Formal Verification of Analog Circuits-Reference-Cited by-同舟云学术

Approaches to Formal Verification of Analog Circuits

Published:2001 Issue: Volume: Page:155-191
ISSN:
Container-title:Low-Power Design Techniques and CAD Tools for Analog and RF Integrated Circuits
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Author:

Hedrich Lars,Hartong Walter

Publisher

Springer US

Link

http://link.springer.com/content/pdf/10.1007/0-306-48089-1_8

Reference36 articles.

1. Mentor Graphics: http://www.mentor.com/formalpro/

2. Verplex Systems: http://www.verplex.com/product.html

3. Avant! Corporation: http://www.avanticorp.com/product/1,1172,50,00.html

4. P. Nussbaum, M. Hinners, L. Menevaut, “SimBoy: An Analog Simulator Interface for Automated Datasheet Generation”, Proceedings of the European Design Automation Conference, pp. 37–41, Nov 1994.

5. St. W. Director, P. Feldmann, K. Krishna, “Optimization of Parametric Yield: A Tutorial”, Proceedings of the Custom Integrated Circuits Conference, pp. 3.1.1–3.1.8, Jan 1992.

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