Author:
Borrione Dominique,Boubekeur Menouer,Mounier Laurent,Renaudin Marc,Siriani Antoine
Publisher
Kluwer Academic Publishers
Reference20 articles.
1. M. Renaudin, “Asynchronous Circuits and Systems: a promising design alternative”, Microelectronics-Engineering Journal, Elsevier Science, Vol. 54, No 1–2, Dec 2000, pp. 133–149.
2. A.J. Martin, “Programming in VLSI: from communicating processes to delay-insensitive circuits”, in C.A.R. Hoare, editor, Developments in Concurrency and Communication, UT Year of Programming Series, 1990, Addison-Wesley, p. 1–64.
3. H. Zheng, E. Mercer, and C. Myers, “Automatic abstraction for verification of timed circuits and systems”, Proc. CAV’01, LNCS 2102, Springer, pp. 182–193, July, 2001.
4. A. Cerone, G. Milne: “A Methodology for the Formal Analysis of Asynchronous Micropipelines”, Proc. FMCAD 2000, LNCS No 1954, Springer Verlag, pp.246–262
5. D. Borrione et al. “An Approach to the Introduction of Formal Validation in an Asynchronous Circuit Design Flow”. Proc. 36th Hawai Int. Conf. on System Sciences (HICSS’03). Jan. 2003
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献