Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays-Reference-Cited by-同舟云学术

Minimum-diameter cyclic arrangements in mapping data-flow graphs onto VLSI arrays

Published:1988-12 Issue:1 Volume:21 Page:85-98
ISSN:0025-5661
Container-title:Mathematical Systems Theory
language:en
Short-container-title:Math. Systems Theory

Author:

Erdös P.,Koren I.,Moran S.,Silberman G. M.,Zaks S.

Publisher

Springer Science and Business Media LLC

Subject

Computational Theory and Mathematics,General Mathematics,Theoretical Computer Science,Computational Theory and Mathematics,Theoretical Computer Science

Link

http://link.springer.com/content/pdf/10.1007/BF02088008.pdf

Reference15 articles.

1. Fisher, A. L.et al., Design of the PSC: A Programmable Systolic Chip,Proc. Third Caltech Conf. on VLSI, March 1983, pp. 287–302.

2. Kung, S. Y., On Supercomputing with Systolic/Wavefront Array Processors,Proc. IEEE, Vol. 72, July 1984, pp. 867–884.

3. Li, G., and Wah, B. W., The Design of Optimal Systolic Arrays,IEEE Trans. Comput., Vol. C-34, January 1985, pp. 66–77.

4. Bokhari, S. H., On the Mapping Problem,IEEE Trans. Comput., Vol. C-30, March 1981, pp. 207–214.

5. Koren, I., and Silberman, G. M., A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach,Proc. 12th International Conf. on Parallel Processing, August 1983, pp. 335–337.

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