Drain Charge Technique in TFET for Analog Transconductor Application
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-022-02161-0.pdf
Reference40 articles.
1. Madan J, Chaujar R (2016) Gate drain-overlapped-asymmetric gate dielectric-GAA-TFET: a solution for suppressed ambipolarity and enhanced ON state behavior. Appl Phys A 122:973. https://doi.org/10.1007/s00339-016-0510-0
2. Nam Hyohyun, Cho Min Hee, Shin Changhwan (2015) Symmetric tunnel field-effect transistor (S-TFET). Curr Appl Phys 15(2):71–77
3. Gopal G, Varma T (2022) Simulation-Based Analysis of Ultra Thin-Body Double Gate Ferroelectric TFET for an Enhanced Electric Performance. Silicon 14:6553–6563. https://doi.org/10.1007/s12633-021-01428-2
4. Gopal Girdhar, Garg Heerak, Agrawal Harshit, Varma Tarun (2022) Stacked ferroelectric heterojunction tunnel field effect transistor on a buried oxide substrate for enhanced electrical performance. Semiconduct Sci Technol 37:10
5. Barboni L, Siniscalchi M, Sensale-Rodriguez B (2015) TFET-Based Circuit Design Using the Transconductance Generation Efficiency gm/Id Method. IEEE J Electron Devices Soc 3(3). DOI: https://doi.org/10.1109/JEDS.2015.2412118
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