CMOS Ring Oscillators Based on Doping-Modified Nanowire FETs: a Novel Design Strategy
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-022-01979-y.pdf
Reference32 articles.
1. Meshkin R, Ziabari SAS, Jordehi AR (2020) Representation of an engineered double-step structure SOI-TFET with linear doped channel for electrical performance improvement: a 2D numerical simulation study. Semicond Sci Technol 35:065006. https://doi.org/10.1088/1361-6641/ab7e02 pp. 1–14
2. Ajibisheh SS, Ziabari SAS, Kiani-Sarkaleh A (2021) Design and analysis of dual-metal-implanted triple-material cylindrical gate-all-around nanowire FET with negative differential resistance and negative transconductance behaviors. J Electron Mater 50:170–185. https://doi.org/10.1007/s11664-020-08572-2
3. Meshkin R, Ziabari SAS, Jordehi AR (2019) A novel analytical approach to optimize the work functions of dual-material double-gate tunneling-FETs. Superlattices Microstruct 126:63–71. https://doi.org/10.1016/j.spmi.2018.12.016
4. Abedini M, Ziabari SAS, Eskandarian A (2019) A high-performance p-type based heterostructure electrically doped NTFET and representation of a neural network model. Appl Phys A 125:318. https://doi.org/10.1007/s00339-019-2614-9 pp. 1–11
5. Abedini M, Ziabari SAS, Eskandarian A (2019) Representation of an improved heterostructure junctionless tunneling FET based on the drain/gate oxide and hetero-dielectric engineering. J Electron Mater 48:5865–5874. https://doi.org/10.1007/s11664-019-07335-y
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1. Performance Evaluation of Nano-scale Core–Shell Junctionless FETs in the Designing of Ultralow-Power Inverter and Ring Oscillator;Journal of Electronic Materials;2024-04-28
2. A Novel High-Performance CMOS VCRO Based on Electrically Doped Nanowire FETs in 10 nm Node;Silicon;2023-08-12
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