Linearity and Analog Performance Analysis of Silicon Junctionless Bulk FinFET Considering Gate Electrode Workfunction Variability and Different Fin Aspect Ratio-Reference-Cited by-同舟云学术

Linearity and Analog Performance Analysis of Silicon Junctionless Bulk FinFET Considering Gate Electrode Workfunction Variability and Different Fin Aspect Ratio

Published:2021-11-03 Issue: Volume: Page:
ISSN:1876-990X
Container-title:Silicon
language:en
Short-container-title:Silicon

Author:

Biswas Kalyan^ORCID,Sarkar Angsuman,Sarkar Chandan Kumar

Publisher

Springer Science and Business Media LLC

Subject

Electronic, Optical and Magnetic Materials

Link

https://link.springer.com/content/pdf/10.1007/s12633-021-01513-6.pdf

Reference45 articles.

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4. Colinge J-P, et al. (2008) FinFETs and other multi-gate transistors, Springer. https://doi.org/10.1007/978-0-387-71752-4

5. Mendiratta N, Tripathi SL (2021) 18nm n-channel and p-channel Dopingless asymmetrical Junctionless DG-MOSFET: low power CMOS based digital and memory applications. Silicon. https://doi.org/10.1007/s12633-021-01417-5

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