A Comprehensive Investigation of Vertically Stacked Silicon Nanosheet Field Effect Transistors: an Analog/RF Perspective
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-021-01128-x.pdf
Reference37 articles.
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2. Bhol K, Nanda U (2021) Nanowire Array-based MOSFET for Future CMOS Technology to Attain the Ultimate Scaling Limit. Silicon. https://doi.org/10.1007/s12633-020-00909-0
3. Yin X, Zhang Y, Zhu H, Wang GL (2020) Vertical Sandwich gate-all-around field-effect transistors with self-aligned high-k metal gates and small effective-gate-length variation. IEEE Electron Device Lett 41:8–11. https://doi.org/10.1109/LED.2019.2954537
4. Yoon J, Lee S, Lee J, Jeong J, Yun H, Baek R (2020) Reduction of process variations for Sub-5-nm node fin and Nanosheet FETs using novel process scheme. IEEE Trans Electron Devices 67:2732–2737. https://doi.org/10.1109/TED.2020.2995340
5. Ryu D, Kim M, Kim S, Choi Y, Yu J, Lee J-H, Parket B-G (2020) Design and optimization of triple-k spacer structure in two-stack Nanosheet FET from OFF-state leakage perspective. IEEE Trans Electron Devices. 67:1317–1322. https://doi.org/10.1109/TED.2020.2969445
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