Performance Analysis of Dual Material Junction Accumulation Mode tri gate Junctionless SOI FET: Modeling and Simulation
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-021-01483-9.pdf
Reference45 articles.
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4. Choi S-J, Moon D-I, Kim S, Duarte JP, Choi Y-K (2011) Sensitivity of threshold voltage to nanowire width variation in Junctionless transistors. IEEE Electron Device Lett 32(2):125–127. https://doi.org/10.1109/LED.2010.2093506
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