Automated synthesis of resilient and tamper-evident analog circuits without a single point of failure

Author:

Kim Kyung-Joong,Wong Adrian,Lipson Hod

Publisher

Springer Science and Business Media LLC

Subject

Computer Science Applications,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Towards smaller single-point failure-resilient analog circuits by use of a genetic algorithm;Informacije MIDEM - Journal of Microelectronics, Electronic Components and Materials;2023-10-10

2. A two‐dimensional RC network topology for fault‐tolerant design of analog circuits;International Journal of Circuit Theory and Applications;2022-04-21

3. Evolutionary Synthesis of Failure-Resilient Analog Circuits;Mathematics;2022-01-05

4. Inference of Other’s Minds with Limited Information in Evolutionary Robotics;International Journal of Social Robotics;2020-05-31

5. A novel evolutionary method of structure-diversified digital filter design and its experimental study;Soft Computing;2017-02-07

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