A deadlock-free routing algorithm for irregular 3D network-on-chips with wireless links-Reference-Cited by-同舟云学术

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A deadlock-free routing algorithm for irregular 3D network-on-chips with wireless links

Published:2017-11-03 Issue:2 Volume:74 Page:953-969
ISSN:0920-8542
Container-title:The Journal of Supercomputing
language:en
Short-container-title:J Supercomput

Author:

Mohseni Zeynab,Reshadi Midia

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Information Systems,Theoretical Computer Science,Software

Link

http://link.springer.com/article/10.1007/s11227-017-2173-9/fulltext.html

Reference54 articles.

1. Micheli GD, Benini L (2006) Network on chips: technology and tools. In: Systems on Silicon

2. Chan J, Parameswaran S (2004) NoCGEN: a template based reuse methodology for networks on chip architecture. In: Proceedings of the 17th International Conference on VLSI Design, Jan 2004, pp 717–720

3. Kumar S, Jantsch A, Soininen JP, Forsell M, Millberg M, Oberg J, Tiensyrja K, Hemani A (2002) A network on chip architecture and design methodology. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI, Apr 2002, pp 105–112

4. Feero BS, Pande PP (2009) Networks-on-chip in a three-dimensional environment: a performance evaluation. IEEE Trans Comput 58(1):32–45

5. Hasan Furhad Md, Kim JM (2014) A shortly connected mesh topology for high performance and energy efficient network-on-chip architectures. J Supercomput 69(2):766–792

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3. Defending Trace-Back Attack in 3D Wireless Internet of Things;IEEE/ACM Transactions on Networking;2022-08

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