Author:
Hunt Warren A.,Swords Sol
Publisher
Springer Berlin Heidelberg
Reference15 articles.
1. Kaufmann, M., Moore, J.S., Boyer, R.S.: ACL2 version 3.4 (2009),
http://www.cs.utexas.edu/~moore/acl2/
2. Davis, J.: VL Verilog translator (unpublished)
3. Krug, R.: Correctness proof of ACL2 floating-point addition specification (unpublished)
4. Hunt Jr., W.A., Swords, S.: Use of the E language. In: Hardware design and Functional Languages (2009)
5. Aagaard, M.D., Jones, R.B., Seger, C.J.H.: Formal verification using parametric representations of boolean constraints. In: Proceedings of the 36th Design Automation Conference, pp. 402–407 (1999)
Cited by
13 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Balancing Automation and Control for Formal Verification of Microprocessors;Computer Aided Verification;2021
2. Verifying x86 instruction implementations;Proceedings of the 9th ACM SIGPLAN International Conference on Certified Programs and Proofs;2020-01-20
3. Industrial hardware and software verification with ACL2;Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences;2017-09-04
4. Machines Reasoning About Machines: 2015;Automated Technology for Verification and Analysis;2015
5. Microcode Verification – Another Piece of the Microprocessor Verification Puzzle;Interactive Theorem Proving;2014