Verifying x86 instruction implementations-Reference-Cited by-同舟云学术

Verifying x86 instruction implementations

Published:2020-01-20 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 9th ACM SIGPLAN International Conference on Certified Programs and Proofs
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Author:

Goel Shilpi¹,Slobodova Anna¹,Sumners Rob¹,Swords Sol¹

Affiliation:

1. Centaur Technology, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3372885.3373811

Reference38 articles.

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3. Accessed: December 2019. Documentation of SV: A Hardware Verification Library. Online. http://www.cs.utexas.edu/users/moore/acl2/manuals/current/ manual/?topic=ACL2____SV . Accessed: December 2019. Documentation of SV: A Hardware Verification Library. Online. http://www.cs.utexas.edu/users/moore/acl2/manuals/current/ manual/?topic=ACL2____SV .

4. Accessed: December 2019. Documentation of VL Verilog Toolkit. Online. http://www.cs.utexas.edu/users/moore/acl2/manuals/current/ manual/?topic=ACL2____VL . Accessed: December 2019. Documentation of VL Verilog Toolkit. Online. http://www.cs.utexas.edu/users/moore/acl2/manuals/current/ manual/?topic=ACL2____VL .

5. Accessed: December 2019. SV: A Hardware Verification Library. Online. https://github.com/acl2/acl2/tree/master/books/centaur/sv . Accessed: December 2019. SV: A Hardware Verification Library. Online. https://github.com/acl2/acl2/tree/master/books/centaur/sv .

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