RCKMPI – Lightweight MPI Implementation for Intel’s Single-chip Cloud Computer (SCC)

Author:

Comprés Ureña Isaías A.,Riepen Michael,Konow Michael

Publisher

Springer Berlin Heidelberg

Reference10 articles.

1. Mattson, T.G., Van der Wijngaart, R.F., Riepen, M., et al.: The 48-core SCC processor: the programmer’s view. In: Proceedings of the 2010 ACM/IEEE Conference on Supercomputing , SC 2010, New Orleans, Louisiana (November 2010)

2. Clauss, C., Lankes, S., Galowicz, J. Bemmerl, T.: iRCCE: A Non-blocking Communication Extension to the RCCE Communication Library for the Intel Single-Chip Cloud Computer, Chair for Operating Systems, RWTH Aachen University, December 17 (2010)

3. van der Wijngaart, R.F., Mattson, T.G., Haas, W.: Light-weight Communications on Intel’s Single-Chip Cloud Computer Processor

4. Howard, J., Dighe, S., Hoskote, Y., et al.: A 48-Core IA-32 Message-Passing Processor with DVFS in 45nm CMOS. In: Proceedings of the International Solid-State Circuits Conference (February 2010)

5. Buntinas, D., Mercier, G., Gropp, W.: Implementation and Shared-Memory Evaluation of MPICH2 over the Nemesis Communication Subsystem. Mathematics and Computer Science Division, Argonne National Laboratory

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