HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

Author:

Šimková Marcela,Lengál Ondřej,Kajan Michal

Publisher

Springer Berlin Heidelberg

Reference7 articles.

1. Šimková, M., Lengál, O., Kajan, M.: HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. Technical Report FIT-TR-2011-05, FIT BUT (2011), http://www.fit.vutbr.cz/~ilengal/pub/FIT-TR-2011-05.pdf

2. Mentor Graphics. Veloce (2011), http://www.mentor.com/products/fv/emulation-systems/veloce/

3. Cadence. Transaction-based Acceleration (TBA) (2011), http://www.cadence.com/products/sd/pages/transactionacc.aspx

4. Huang, C.-Y., Yin, Y.-F., Hsu, C.-J., Huang, T.B., Chang, T.M.: SoC HW/SW Verification and Validation. In: Proc. of ASPDAC 2011. IEEE (2011)

5. Schwarztrauber, A.: SEmulation: Use Your Emulation Board as a Hardware Accelerator for ModelSim SE. Verification Horizons 5, 31–34 (2009)

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