Author:
Tillich Stefan,Kirschbaum Mario,Szekely Alexander
Publisher
Springer Berlin Heidelberg
Reference23 articles.
1. Ambrose, J.A., Parameswaran, S., Ignjatovic, A.: MUTE-AES: A Multiprocessor Architecture to prevent Power Analysis based Side Channel Attack of the AES Algorithm. In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2008, pp. 678–684. IEEE (2008)
2. Barthe, L., Benoit, P., Torres, L.: Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures. In: 2010 International Conference on Field Programmable Logic and Applications, pp. 139–144. IEEE Computer Society (2010)
3. Faraday Technology Corporation. Faraday FSA0A_C 0.18 μm ASIC Standard Cell Library (2004), Details, http://www.faraday-tech.com
4. Gaisler Research. GRLIB IP Library User’s Manual. Version 1.1.0 B4100 (October 2010) http://www.gaisler.com/products/grlib/grlib.pdf
5. Kirschbaum, M., Popp, T.: Evaluation of a DPA-Resistant Prototype Chip. In: 25th Annual Computer Security Applications Conference (ACSAC 2009), Honolulu, Hawaii, USA, December 7-11 (2009)
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Concealing Secrets in Embedded Processors Designs;Smart Card Research and Advanced Applications;2017
2. Cost-Effective Design Strategies for Securing Embedded Processors;IEEE Transactions on Emerging Topics in Computing;2016-01
3. On Secure Embedded Token Design;Lecture Notes in Computer Science;2013