Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures-Reference-Cited by-同舟云学术

Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures

Published:2010 Issue: Volume: Page:111-125
ISSN:0302-9743
Container-title:High Performance Embedded Architectures and Compilers
language:
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Author:

Monakov Alexander,Lokhmotov Anton,Avetisyan Arutyun

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-11515-8_10.pdf

Reference11 articles.

1. Asanovic, K., Bodik, R., Catanzaro, B.C., Gebis, J.J., Husbands, P., Keutzer, K., Patterson, D.A., Plishker, W.L., Shalf, J., Williams, S.W., Yelick, K.A.: The landscape of parallel computing research: A view from Berkeley. Technical Report UCB/EECS-2006-183, EECS Department, University of California, Berkeley (December 2006)

2. Baskaran, M.M., Bordawekar, R.: Optimizing sparse matrix-vector multiplication on GPUs. Technical report, IBM TJ Watson Research Center (2009)

3. Bell, N., Garland, M.: Efficient sparse matrix-vector multiplication on CUDA. NVIDIA Technical Report NVR-2008-004 (2008)

4. Lecture Notes in Computer Science;L. Buatois,2007

5. Kincaid, D.R., Oppe, T.C., Young, D.M.: ITPACKV 2D User’s Guide

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