Reduction of Crosstalk Noise and Delay in VLSI Interconnects Using Schmitt Trigger as a Buffer and Wire Sizing
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Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/978-3-642-31600-5_66.pdf
Reference10 articles.
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2. Saini, S., Mahesh Kumar, A., Veeramachaneni, S., Srinivas, M.B.: Schmitt Trigger as an alternative to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects. In: IEEE Region 10 Conference TENCON (2009)
3. Saini, S., Mahesh Kumar, A., Veeramachaneni, S., Srinivas, M.B.: An Alternative approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects. In: 3rd to 7th International Conference on VLSI Design 2010, Bangalore, pp. 411–416 (January 2010)
4. Saini, S.: A Novel Approach to reduce Delay and Power in VLSI Interconnects, M.S. Thesis Electronics and Communication Engineering (2009)
5. Mezhiba, A., Friedman, E.G.: Frequency Characteristics of High Speed Power Distribution Networks. Analog Integrated Circuits and Signal Processing 35(2/3), 207–214 (2003)
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