Shape prior guided defect pattern classification and segmentation in wafer bin maps-Reference-Cited by-同舟云学术

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Shape prior guided defect pattern classification and segmentation in wafer bin maps

Published:2023-11-07 Issue: Volume: Page:
ISSN:0956-5515
Container-title:Journal of Intelligent Manufacturing
language:en
Short-container-title:J Intell Manuf

Author:

Wang Rui,Wang Songhao,Niu Ben^ORCID

Funder

National Natural Science Foundation of China

Basic and Applied Basic Research Foundation of Guangdong Province

Shenzhen Science and Technology Innovation Program

Publisher

Springer Science and Business Media LLC

Subject

Artificial Intelligence,Industrial and Manufacturing Engineering,Software

Link

https://link.springer.com/content/pdf/10.1007/s10845-023-02242-w.pdf

Reference38 articles.

1. Abd Al Rahman, M., Danishvar, S., & Mousavi, A. (2021). An improved capsule network (wafercaps) for wafer bin map classification based on dcgan data upsampling. IEEE Transactions on Semiconductor Manufacturing, 35(1), 50–59. https://doi.org/10.1109/TSM.2021.3134625

2. Adly, F., Alhussein, O., Yoo, P. D., Al-Hammadi, Y., Taha, K., Muhaidat, S., Jeong, Y.-S., Lee, U., & Ismail, M. (2015). Simplified subspaced regression network for identification of defect patterns in semiconductor wafer maps. IEEE Transactions on Industrial Informatics, 11(6), 1267–1276. https://doi.org/10.1109/TSM.2018.2841416

3. Badrinarayanan, V., Kendall, A., & Cipolla, R. (2017). Segnet: A deep convolutional encoder-decoder architecture for image segmentation. IEEE Transactions on Pattern Analysis and Machine Intelligence, 39(12), 2481–2495. https://doi.org/10.1109/TPAMI.2016.2644615

4. Chien, C.-F., Hsu, C.-Y., & Chen, P.-N. (2013). Semiconductor fault detection and classification for yield enhancement and manufacturing intelligence. Flexible Services and Manufacturing Journal, 25(3), 367–388. https://doi.org/10.1007/s10696-012-9161-4

5. Chiu, M.-C., & Chen, T.-M. (2021). Applying data augmentation and mask R-CNN-based instance segmentation method for mixed-type wafer maps defect patterns classification. IEEE Transactions on Semiconductor Manufacturing, 34(4), 455–463. https://doi.org/10.1109/TSM.2021.3118922

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