1. F. Schürmann, S. Hohmann, J. Schemmel, and K. Meier. Towards an Artificial Neural Network Framework. In Adrian Stoica et.al., editor, Proceedings of the 2002 NASA/DoD Conference an Evolvable Hardware, pages 266–273, July 2002.
2. J. Langeheine, K. Meier, and J. Schemmel. Intrinsic Evolution of Quasi DC Solutions for Transistor Level Analog Electronic Circuits Using a CMOS FPTA chip. In Proceedings of the 2002 NASA/DoD Conference an Evolvable Hardware.
3. Adrian Stoica et. al. Evolving Circuits in Seconds: Experiments with a Stand-Alone Board-Level Evolvable System. In Adrian Stoica et.al., editor, Proceedings of the 2002 NASA/DoD Conference an Evolvable Hardware, pages 67–74, July 2002.
4. Barry Shackleford et. al. A high-performance, pipelined, FPGA-based genetic algorithm machine. Genetic Programming and Evolvable Machines, 1(2):33–60, March 2001.
5. J. Schemmel, F. Schürmann, S. Hohmann, and K. Meier. An integrated mixedmode neural network architecture for megasynapse ANNs. In Proceedings of the 2002 International Joint Conference on Neural Networks IJCNN’02, page 2704. IEEE, May 2002.