Author:
Lam William K. C.,Brayton Robert K.
Cited by
7 articles.
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1. Constructive Boolean circuits and the exactness of timed ternary simulation;Formal Methods in System Design;2012-03-28
2. Logic Level Power Estimation;Designing CMOS Circuits for Low Power;2002
3. Accurate Power Estimation of Logic Structures Based on Timed Boolean Functions;Integrated Circuit Design;2000
4. An analytical delay model;Journal of Computer Science and Technology;1999-03
5. Boolean process;Science in China Series E: Technological Sciences;1997-06