An Overview of the VLSI Interconnect Problem-Reference-Cited by-同舟云学术

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An Overview of the VLSI Interconnect Problem

Published:2014-10-16 Issue: Volume: Page:1-9
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Container-title:Multi-Net Optimization of VLSI Interconnect
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Author:

Moiseev Konstantin,Kolodny Avinoam,Wimer Shmuel

Publisher

Springer New York

Link

http://link.springer.com/content/pdf/10.1007/978-1-4614-0821-5_1

Reference12 articles.

1. Bakoglu, H. B., and James D. Meindl. "Optimal interconnection circuits for VLSI." Electron Devices, IEEE Transactions on 32.5 (1985): 903–909.

2. M. T. Bohr, “Interconnect scaling – the real limiter to high performance ULSI,” 1995, in IEDM, pp. 241–244.

3. Bolotin, Evgeny, et al. “QNoC: QoS architecture and design process for network on chip.” Journal of Systems Architecture 50.2 (2004): 105–128.

4. Christie, P.; Stroobandt, D., “The interpretation and application of Rent's rule,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol. 8, no. 6, pp. 639–648, Dec. 2000. doi: 10.1109/92.902258

5. Jeffrey A. Davis and James D. Meindl. 2003. Interconnect Technology and Design for Gigascale Integration. Kluwer Academic Publishers, Norwell, MA, USA.

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