Reconfigurable Memories
Author:
Publisher
Springer New York
Link
http://link.springer.com/content/pdf/10.1007/978-1-4614-1746-0_4.pdf
Reference18 articles.
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2. Austin, T., Larson, E., Ernst, D.: SimpleScalar: an infrastructure for computer system modeling. Computer 35(2), 59–67 (2002). doi:10.1109/2.982917
3. Banakar, R., Steinke, S., Lee, B.S., Balakrishnan, M., Marwedel, P.: Scratchpad memory: design alternative for cache on-chip memory in embedded systems. In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES ’02, pp. 73–78. ACM, New York (2002). doi:10.1145/774789.774805. http://doi.acm.org/10.1145/774789.774805
4. Beck, A.C.S., Rutzig, M.B., Gaydadjiev, G., Carro, L.: Transparent reconfigurable acceleration for heterogeneous embedded applications. In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE ’08, pp. 1208–1213. ACM, New York (2008). doi:10.1145/1403375.1403669. http://doi.acm.org/10.1145/1403375.1403669
5. Berticelli Lo, T., Beck, A., Rutzig, M., Carro, L.: A low-energy approach for context memory in reconfigurable systems. In: IEEE International Symposium on Parallel Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010 pp. 1–8. IEEE, Piscataway (2010)
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