1. F. Crnic, “Electrical Test of Multi-Chip Substrates,” Proc. of International Conference and Exhibition on Multi-chip Modules (ICEMM), 1993, pp. 422–428.
2. J. Marshall, F.C. Chong, D. Mollin, and S. Westbrook, “CAD-Based Net Capacitance Testing of Unpopulated MCM Substrate,” IEEE Trans. on Components, Packaging, and Manufacturing Technology: Advanced Packaging, Part B, Vol. 17, No. 1, pp. 50–55, Feb. 1994.
3. L. Economikos, T. Morrison, and F. Crnic, “Electrical Test of Multichip Substrates,” IEEE Trans. on Components, Packaging, and Manufacturing Technology: Advanced Packaging, Part B, Vol. 17, No. 1, pp. 56–61, Feb. 1994.
4. H. Hamel, S. Kadakia, and H. Bhatia, “Capacitance test technique for the MCM of the 90s,” Proceedings of the International Electronic Packaging Conference, Sept. 12–15, 1993, pp. 855–872.
5. Circuits Manufacturing;RW Wedwick,1974