Exploiting structural similarities in a BDD-based verification method-Reference-Cited by-同舟云学术

Exploiting structural similarities in a BDD-based verification method

Published:1995 Issue: Volume: Page:110-125
ISSN:0302-9743
Container-title:Theorem Provers in Circuit Design
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Author:

Eijk C. A. J.,Janssen G. L. J. M.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-59047-1_45.pdf

Reference18 articles.

1. Ashar, P., Ghosh, A., Devadas, S.: Boolean Satisfiability and Equivalence Checking using General Binary Decision Diagrams. Proc. ICCD-91, pp. 259–264, 1991

2. Berkelaar, M.R.C.M., Theeuwen, J.F.M.: Logic Synthesis with Emphasis on Area-Power-Delay Trade-Off. Journal of Semicustom ICs, September 1991, pp. 37–42

3. Berman, C.L.: On Logic Comparison. Proc. DAC-81, pp. 854–861, 1981

4. Berman, C.L., Trevillyan, L.H.: Functional Comparison of Logic Designs for VLSI Circuits. Proc. ICCAD-89, pp. 456–459, 1989

5. Brace, K.S., Rudell, R.L., Bryant, R.E.: Efficient Implementation of a BDD package. Proc. DAC-90, pp. 40–45, 1990

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