1. Huemoeller, R., Reichman, C., Zwenger, C.: Embedded die packaging technologies enable innovative 2D and 3D structures for portable applications. Global Semicond. Alliance. 21(1), 1–2 (2014)
2. Rahim, M., Zhou, T., Fan, X.J., Rupp, G.: Board level temperature cycling study of large array wafer level packages. In: Proceedings of Electronic Components and Technology Conference (59th ECTC), pp. 898–902. (2009)
3. Milena, V.S.: Thermally induced deformations in die-substrate assembly. Theor. Appl. Mech. 35(1–3), 305–322 (2008)
4. Wetz, L., White, J., Keser, B.: Improvement in WL-CSP reliability by wafer thinning. In: Electronic Components and Technology Conference, pp. 853–856. (2003)
5. Park, H.W., Cho, S.H., Kress, J., Bruderer, A., Galster, N.: Dielectric composite material with good performance and process ability for embedding of active and passive components into PCBs. In: Proceedings 63rd Electronic Components and Technology Conference (ECTC), Las Vegas, USA, IEEE, pp. 1325–1331. (2013)