Property-Based Dynamic Verification and Test-Reference-Cited by-同舟云学术

Property-Based Dynamic Verification and Test

Published:2012 Issue: Volume: Page:157-176
ISSN:
Container-title:Design Technology for Heterogeneous Embedded Systems
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Author:

Borrione Dominique,Morin-Allory Katell,Oddos Yann

Publisher

Springer Netherlands

Link

http://link.springer.com/content/pdf/10.1007/978-94-007-1125-9_8.pdf

Reference21 articles.

1. LNCS;Y. Abarbanel,2000

2. Altera: Quartus II Handbook v9.1 (Complete Five-Volume Set) (2005). http://www.altera.com/literature/

3. LNCS;I. Beer,1997

4. Bergeron, J., Cerny, E., Hunter, A., Nightingale, A.: Verification Methodology Manual for SystemVerilog. Springer, Berlin (2006). ISBN 978-0-387-25556-9

5. Bloem, R., Cavada, R., Eisner, C., Pill, I., Roveri, M., Semprini, S.: Manual for property simulation and assurance tool (deliverable 1.2/4-5). Technical report, PROSYD Project (2004)

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