1. Balde, J. W., “As Packaging Density Increases, Focus Shifts to SSI and MSI Chips,” Electronics, 57 (11), 103 (1984a).
2. Balde, J. W., “New Packaging Strategy to Reduce System Costs,” IEEE Transactions on Components, Hybrids and Manufacturing Technology, CHMT-7 (3), 257 (1984b).
3. Bauer, J., Presentation during Surface Mount Seminar, ISHM, Dallas, Texas (Sept. 1984).
4. Garth, E., and Gray, F., “The Impact of Plastic Leaded Chip Carriers (PLCC’s) on Multilayer Design and Fabrication,” Proc. Technical Conference, Third Annual International Electronics Packaging Conference, p. 535, Oct. 24–26, 1983.
5. Knausenberger, W. H., and Schaper, L. W., “Interconnection Costs of Various Substrates—The Myth of Cheap Wire,” IEEE Transactions on Components, Hybrids and Manufacturing Technology, CHMT-7 (3), 261 (Sept. 1984).