1. D. H. Albonesi and I. Koren, An analytical model of high performance superscalar-based multiprocessors, Intl. Conf. on Parallel Architectures and Compilation Techniques, pp. 194–203 (1995).
2. E. D. Lazowska, J. Zahorjan, G. S. Graham, and K. C. Sevcik, Quantative System Performance, Computer Analysis Using Queuing Network Models, Prentice Hall, Englewood Cliffs, New Jersey (1991).
3. D. Lenoski, J. Laudon, T. Joe, D. Nakahira, L. Stevens, A. Gupta, and J. Hennessy, The DASH prototype: implementation and performance, Int’l. Symp. on Computer Architecture, pp. 92–103 (1992).
4. J. R. Goodman and P. J. Woest, The Wisconsin multicube: a new large-scale cache-coherent multiprocessor, Intl. Symp. on Computer Architecture, pp. 422–431 (1988).
5. R. Jog, P. L. Vitale, and J. R. Callister, Performance evaluation of a commercial cache-coherent shared memory multiprocessor, Intl. Conf. on Measurement and Modeling of Computer Systems, pp. 173–182 (1990).