1. V. Ferlet-Cavrois, L.W. Massengill, P. Gouker, Single event transients in digital CMOS—a review. IEEE Trans. Nucl. Sci. 60, 1767–1790 (2013)
2. M. Agarwal, B.C. Paul, M. Zhang, S. Mitra, Circuit failure prediction and its application to transistor aging, in VLSI Test Symposium, 2007. 25th IEEE (2007), pp. 277–286
3. S. Bhardwaj, W. Wang, R. Vattikonda, Y. Cao, S. Vrudhula, Predictive modeling of the NBTI effect for reliable design, in Custom Integrated Circuits Conference, 2006. CICC’06. IEEE (2006), pp. 189–192
4. R. Vattikonda, W. Wenping, C. Yu, Modeling and minimization of PMOS NBTI effect for robust nanometer design, in Design Automation Conference, 2006 43rd ACM/IEEE (2006), pp. 1047–1052
5. D. Rossi, M. Omaña, C. Metra, A. Paccagnella, Impact of bias temperature instability on soft error susceptibility, in IEEE Transaction on Very Large Scale Integration (VLSI) Systems, vol 23 (2015), pp. 743–751