A Multi-start Heuristic for Multiplicative Depth Minimization of Boolean Circuits-Reference-Cited by-同舟云学术

A Multi-start Heuristic for Multiplicative Depth Minimization of Boolean Circuits

Published:2018 Issue: Volume: Page:275-286
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
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Author:

Carpov Sergiu,Aubry Pascal,Sirdey Renaud

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-319-78825-8_23

Reference15 articles.

1. Amarú, L., Gaillardon, P.-E., De Micheli, G.: The EPFL combinational benchmark suite. In: Proceedings of the 24th International Workshop on Logic & Synthesis (IWLS) (2015)

2. Benhamouda, F., Lepoint, T., Mathieu, C., Zhou, H.: Optimization of bootstrapping in circuits. In: SODA, pp. 2423–2433. SIAM (2017)

3. Berkeley Logic Synthesis and Verification Group. ABC: A System for Sequential Synthesis and Verification, Release 30308. http://www.eecs.berkeley.edu/~alanmi/abc/

4. Lecture Notes in Computer Science;J Boyar,2006

5. Lecture Notes in Computer Science;Z Brakerski,2012

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