1. B. Ho, X. Sun, C. Shin, T.-J.K. Liu, Design optimization of multigate bulk MOSFETs. IEEE Trans. Electron Devices 60(1), 28–33 (2013)
2. J.-H. Lee, Nano Devices and Circuit Techniques for Low-Energy Applications and Energy Harvesting (Springer, Dordrecht, 2016)
3. C.A. Mack, Seeing double. IEEE Spectrum 11(45), 46–51 (2008). https://doi.org/10.1109/MSPEC.2008.4659384
4. C.C. Chiang, J. Kawa, Design for Manufacturability and Yield for Nano-Scale CMOS (Springer, Dordrecht, 2007)
5. M. Amirtharaj, Z. Kruder, Lecture: ENEE 416: Integrated Circuit (IC) Fabrication Lab (Fall 2011): Topic: Double patterning and hyper-numerical aperture immersion lithography (2011). http://www.ece.umd.edu/class/enee416/GroupActivities/GroupActivity8.htm