Monitor and Knob Techniques in Network-on-Chip Architectures
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Publisher
Springer International Publishing
Link
http://link.springer.com/content/pdf/10.1007/978-3-319-91962-1_9
Reference31 articles.
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4. Brayton, R. K., Sangiovanni-Vincentelli, A. L., McMullen, C. T., & Hachtel, G. D. (1984). Logic minimization algorithms for VLSI synthesis. Norwell: Kluwer Academic Publishers.
5. Chen, L., Zhu, D., Pedram, M., & Pinkston, T. M. (2015). Power punch: Towards non-blocking power-gating of NoC routers. In HPCA. https://doi.org/10.1109/HPCA.2015.7056048 .
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