Architectural Synthesis of Petri Nets

Author:

Bukowiec Arkadiusz

Publisher

Springer International Publishing

Reference29 articles.

1. Adamski, M., & Węgrzyn, M. (2009). Petri nets mapping into reconfigurable logic controllers. Electronics and Telecommunications Quarterly, 55(2), 157–182.

2. Adamski, M., Węgrzyn, M., & Wolański, P. (1998). A VHDL based Approach to Logic Controllers Design. In Proceedings of International Conference Programmable Devices and Systems PDS’98 (pp. 9–16). Gliwice, Poland.

3. Barkalov, A., Titarenko, L., Malcheva, R., & Soldatov, K. (2013). Hardware reduction in FPGA-based Moore FSM. Journal of Circuits, Systems and Computers, 22(3), 1350006.

4. Biliński, K., Adamski, M., Saul, J., & Dagless, E. (1994). Petri-net-based algorithms for parallel-controller synthesis. IEE Proceedings – Computers and Digital Techniques, 141(6), 405–412.

5. Brown, S., & Vernesic, Z. (2005). Fundamentals of digital logic with VHDL design (2nd ed.). New York: McGraw-Hill.

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