Bit-Vector Rewriting with Automatic Rule Generation-Reference-Cited by-同舟云学术

Bit-Vector Rewriting with Automatic Rule Generation

Published:2014 Issue: Volume: Page:663-679
ISSN:0302-9743
Container-title:Computer Aided Verification
language:
Short-container-title:

Author:

Nadel Alexander

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-319-08867-9_44

Reference21 articles.

1. Babic, D.: Exploiting structure for scalable software verification. Dissertation, The University of British Columbia (2008)

2. Bansal, S.: Peephole Superoptimization. Dissertation, Stanford University (2008)

3. Bansal, S., Aiken, A.: Automatic generation of peephole superoptimizers. In: Shen, J.P., Martonosi, M. (eds.) ASPLOS, pp. 394–403. ACM (2006)

4. Barrett, C., Stump, A., Tinelli, C.: The Satisfiability Modulo Theories Library, SMT-LIB (2010), http://www.SMT-LIB.org

5. Barrett, C., Stump, A., Tinelli, C.: The SMT-LIB Standard: Version 2.0. In: Gupta, A., Kroening, D. (eds.) Proceedings of the 8th International Workshop on Satisfiability Modulo Theories, Edinburgh, UK (2010)

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Demystifying Template-Based Invariant Generation for Bit-Vector Programs;2023 38th IEEE/ACM International Conference on Automated Software Engineering (ASE);2023-09-11

2. Rewrite rule inference using equality saturation;Proceedings of the ACM on Programming Languages;2021-10-20

3. Fast bit-vector satisfiability;Proceedings of the 29th ACM SIGSOFT International Symposium on Software Testing and Analysis;2020-07-13

4. Declarative Language for Geometric Pattern Matching in VLSI Process Rule Modeling;Proceedings of the 2019 International Symposium on Physical Design;2019-04-04

5. Syntax-Guided Rewrite Rule Enumeration for SMT Solvers;Lecture Notes in Computer Science;2019