On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA’s Configuration Infrastructure
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Springer International Publishing
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http://link.springer.com/content/pdf/10.1007/978-3-319-05960-0_8
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5. Shelburne, M., Patterson, C., Athanas, P., Jones, M., Martin, B., Fong, R.: MetaWire: Using FPGA Configuration Circuitry to Emulate a Network-on-Chip. In: International Conf. on Field Programmable Logic and Applications, pp. 257–262 (2008)
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1. On the Impact of Replacing Low-Speed Configuration Buses on FPGAs with the Chip’s Internal Configuration Infrastructure;ACM Transactions on Reconfigurable Technology and Systems;2015-11-24
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