FPGA-Based Architecture for Computing Testors-Reference-Cited by-同舟云学术

FPGA-Based Architecture for Computing Testors

Published:2007 Issue: Volume: Page:188-197
ISSN:0302-9743
Container-title:Intelligent Data Engineering and Automated Learning - IDEAL 2007
language:
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Author:

Rojas Alejandro,Cumplido René,Carrasco-Ochoa J. Ariel,Feregrino Claudia,Martínez-Trinidad J. Francisco

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-540-77226-2_20

Reference10 articles.

1. Lecture Notes in Computer Science;R. Cumplido,2006

2. Dmitriev, A.N., Zhuravlev, Y.I., Krendeliev, F.P.: About Mathematical Principles of Objects and Phenomena Classification. Diskretni Analiz 7, 3–15 (1966) (in Russian)

3. Martínez-Trinidad, J.F., Guzmán-Arenas, A.: The Logical Combinatorial Approach to Pattern Recognition an Overview through Selected Works. Pattern Recognition 34(4), 741–751 (2001)

4. Lazo-Cortes, M., Ruiz-Shulcloper, J., Alba-Cabrera, E.: An Overview of the Evolution of the Concept of Testor. Pattern Recognition 34(4), 753–762 (2001)

5. Sánchez Díaz, G., Lazo Cortés, M.: Modifying BT Algorithm for Improving its Runtimes. Revista Ciencias Matemáticas 20(2), 129–136 (2002) (in Spanish)

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